Verilog based ANN For Handwritten Alphabet Recognition using a Fully Connected Architecture

Abstract

Manufactured Insights (AI) and Machine Learning (ML) are increasingly becoming apparatus usage, mainly in neural network models. This extension offers a Verilog-based Manufactured Neural Network (ANN) designed for handwritten letter set recognition on an FPGA. The ANN is a 5-layer fully connected technology-based architecture, making use of ReLU and Sigmoid activation functions for efficient pattern recognition Usage is optimized with respect to resource consumption and control use, ensuring that it can work in real time. The plan employs FPGA parallelism to boost the performance speed, but with the minimal usage of DSP and memory. Comparisons with conventional floating-point ANN models indicate improvements achieved through fixed-point arithmetic and binarized neural systems (BNNs), which reduce complexity in computation. Additionally, successful experiences from the Perceptron calculations and VHDL-based ANN models are directions for improvement in weight capacity and enactment work executions. The organize is prepared utilizing the MNIST dataset, accomplishing 98% accuracy, with equipment testing and confirmation conducted in Vivado. The venture illustrates the potential of FPGA-based ANNs for real-time, low-power applications in character acknowledgment and advanced flag handling. Future advancements incorporate half breed ANN-perceptron models and encourage optimization of weight accuracy for upgraded proficiency. This work contributes to the developing field of hardware-accelerated neural systems, advertising a adaptable and productive approach to FPGA-based AI.